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authorwires <wires@noreply.wires.systems>2025-10-09 20:52:54 -0400
committerwires <wires@noreply.wires.systems>2025-10-09 20:52:54 -0400
commita778e63f8174a2e416aa7d15883c983830428cc0 (patch)
tree2bc3b3b18b266c7b7d53baecc3ba982271dc02bd /src/main.zig
parentslight build.zig change (diff)
downloadzosimos-a778e63f8174a2e416aa7d15883c983830428cc0.tar.gz
start working on devicetree
Diffstat (limited to '')
-rw-r--r--src/main.zig16
1 files changed, 14 insertions, 2 deletions
diff --git a/src/main.zig b/src/main.zig
index 89130f5..3b013e8 100644
--- a/src/main.zig
+++ b/src/main.zig
@@ -1,8 +1,20 @@
 const mini_uart = @import("mini_uart.zig");
+const DtParser = @import("DtParser.zig");
 
-export fn main(dt_addr: u32) void {
+export fn main(dt_base: [*]u8) void {
     mini_uart.enable();
-    mini_uart.print("meow\n0x{x}\n", .{dt_addr});
+
+    const dt = DtParser.new(dt_base);
+
+    var mem_rsvmap = dt.memRsvmap();
+
+    while (mem_rsvmap.next()) |rsv_entry| {
+        mini_uart.print("addr: 0x{x} size: 0x{x}\n", .{
+            rsv_entry.address,
+            rsv_entry.size,
+        });
+    }
+    mini_uart.print("0x{x}\n", .{dt.magic()});
 
     while (true) {}
 }